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Searched refs:DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h22204 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h23634 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h26001 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h20342 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h20363 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h28427 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h26450 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h29191 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h30444 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h25267 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h29350 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h28514 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h23658 #define DPG2_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro