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Searched refs:DPG2_DPG_CONTROL__DPG_HRES__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h22193 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h23623 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h25990 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h20332 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h20353 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h28416 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h26439 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h29180 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h30433 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h25256 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h29339 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h28503 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h23647 #define DPG2_DPG_CONTROL__DPG_HRES__SHIFT … macro