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Searched refs:DPG2_DPG_CONTROL__DPG_HRES_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h22200 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_2_1_sh_mask.h23630 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_2_1_0_sh_mask.h25997 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_5_1_sh_mask.h20339 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_5_0_sh_mask.h20360 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_1_2_sh_mask.h28423 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_1_5_sh_mask.h26446 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_1_6_sh_mask.h29187 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_1_4_sh_mask.h30440 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_0_2_sh_mask.h25263 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_2_0_0_sh_mask.h29346 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_0_0_sh_mask.h28510 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro
H A Ddcn_3_2_0_sh_mask.h23654 #define DPG2_DPG_CONTROL__DPG_HRES_MASK … macro