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Searched refs:DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h14005 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h13894 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h21965 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h23395 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h25758 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h20149 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h20170 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h28188 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h26211 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h28952 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h30205 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h25028 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h29107 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h28278 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h23419 #define DPG1_DPG_RAMP_CONTROL__DPG_INC1__SHIFT … macro