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Searched refs:DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h14004 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h13893 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h21964 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h23394 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h25757 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h20148 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h20169 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h28187 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h26210 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h28951 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h30204 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h25027 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h29106 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h28277 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h23418 #define DPG1_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro