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Searched refs:DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h13805 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h13653 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h21724 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h23154 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h25513 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h19954 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h19975 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h27947 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h25970 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h28711 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h29964 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h24787 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h28862 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h28040 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h23178 #define DPG0_DPG_RAMP_CONTROL__DPG_INC0__SHIFT … macro