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Searched refs:DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h33956 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_0_1_sh_mask.h33455 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_2_1_sh_mask.h31182 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_2_1_0_sh_mask.h39535 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_5_1_sh_mask.h30812 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_5_0_sh_mask.h30833 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_1_2_sh_mask.h36084 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_1_5_sh_mask.h34054 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_1_6_sh_mask.h36958 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_1_4_sh_mask.h42444 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_0_2_sh_mask.h38253 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_2_0_0_sh_mask.h43483 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_0_0_sh_mask.h43065 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
H A Ddcn_3_2_0_sh_mask.h31206 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_sh_mask.h40407 #define DP2_DP_SEC_CNTL__DP_SEC_ATP_ENABLE_MASK … macro