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Searched refs:DOMAIN0_PG_STATUS (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/pg/dcn35/
H A Ddcn35_pg_cntl.h45 SR(DOMAIN0_PG_STATUS), \
87 PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_DESIRED_PWR_STATE, mask_sh), \
88 PG_CNTL_SF(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
151 uint32_t DOMAIN0_PG_STATUS; member
H A Ddcn35_pg_cntl.c153 REG_GET(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, &pwr_status); in pg_cntl35_hubp_dpp_pg_status()
207 REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 10000); in pg_cntl35_hubp_dpp_pg_control()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn302/
H A Ddcn302_hwseq.c117 REG_WAIT(DOMAIN0_PG_STATUS, in dcn302_hubp_pg_control()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/
H A Ddcn31_hwseq.c463 REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000); in dcn31_hubp_pg_control()
/linux/drivers/gpu/drm/amd/display/dc/resource/dcn401/
H A Ddcn401_resource.c549 SR(DOMAIN0_PG_STATUS), \
598 HWS_SF(, DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, mask_sh), \
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c184 REG_WAIT(DOMAIN0_PG_STATUS, DOMAIN_PGFSM_PWR_STATUS, pwr_status, 1, 1000); in dcn32_hubp_pg_control()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/
H A Ddcn20_hwseq.c636 REG_WAIT(DOMAIN0_PG_STATUS, in dcn20_hubp_pg_control()
/linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c974 REG_WAIT(DOMAIN0_PG_STATUS, in dcn10_hubp_pg_control()