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Searched refs:DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h7749 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK 0x20 macro
H A Ddce_11_0_sh_mask.h6689 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK 0x20 macro
H A Ddce_10_0_sh_mask.h6793 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK 0x20 macro
H A Ddce_11_2_sh_mask.h7769 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK 0x20 macro
H A Ddce_12_0_sh_mask.h4702 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1380 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_1_0_sh_mask.h3672 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2323 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2178 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_1_2_sh_mask.h1815 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_1_5_sh_mask.h1324 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2380 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10433 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2249 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2446 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2321 #define DMCU_RAM_ACCESS_CTRL__IRAM_HOST_ACCESS_EN_MASK … macro