Home
last modified time | relevance | path

Searched refs:DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5958 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT 0x00000004 macro
H A Ddce_8_0_sh_mask.h7748 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT 0x4 macro
H A Ddce_11_0_sh_mask.h6688 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT 0x4 macro
H A Ddce_10_0_sh_mask.h6792 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT 0x4 macro
H A Ddce_11_2_sh_mask.h7768 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT 0x4 macro
H A Ddce_12_0_sh_mask.h4695 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1373 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_1_0_sh_mask.h3665 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h2316 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h2171 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h1808 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h1317 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h2373 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h10426 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h2242 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h2439 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h2314 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN__SHIFT … macro