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Searched refs:DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5955 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK 0x00000010L macro
H A Ddce_8_0_sh_mask.h7747 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK 0x10 macro
H A Ddce_11_0_sh_mask.h6687 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK 0x10 macro
H A Ddce_10_0_sh_mask.h6791 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK 0x10 macro
H A Ddce_11_2_sh_mask.h7767 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK 0x10 macro
H A Ddce_12_0_sh_mask.h4701 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1379 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_1_0_sh_mask.h3671 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2322 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2177 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_1_2_sh_mask.h1814 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_1_5_sh_mask.h1323 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2379 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10432 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2248 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2445 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2320 #define DMCU_RAM_ACCESS_CTRL__ERAM_HOST_ACCESS_EN_MASK … macro