Home
last modified time | relevance | path

Searched refs:DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5785 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x00000400L macro
H A Ddce_8_0_sh_mask.h7895 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x400 macro
H A Ddce_11_0_sh_mask.h6825 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x400 macro
H A Ddce_10_0_sh_mask.h6923 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x400 macro
H A Ddce_11_2_sh_mask.h7897 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK 0x400 macro
H A Ddce_12_0_sh_mask.h4881 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1527 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
H A Ddcn_1_0_sh_mask.h3843 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2490 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2349 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
H A Ddcn_3_1_2_sh_mask.h1986 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2551 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10604 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2420 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2617 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2492 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_OCCURRED_MASK … macro