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Searched refs:DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5784 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT 0x0000000a macro
H A Ddce_8_0_sh_mask.h7898 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT 0xa macro
H A Ddce_11_0_sh_mask.h6828 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT 0xa macro
H A Ddce_10_0_sh_mask.h6926 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT 0xa macro
H A Ddce_11_2_sh_mask.h7900 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT 0xa macro
H A Ddce_12_0_sh_mask.h4828 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1502 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
H A Ddcn_1_0_sh_mask.h3794 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h2441 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h2300 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h1937 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h2502 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h10555 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h2371 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h2568 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h2443 #define DMCU_INTERRUPT_STATUS__UC_INTERNAL_INT_CLEAR__SHIFT … macro