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Searched refs:DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK (Results 1 – 16 of 16) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5777 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK 0x00000100L macro
H A Ddce_8_0_sh_mask.h7889 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK 0x100 macro
H A Ddce_11_0_sh_mask.h6819 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK 0x100 macro
H A Ddce_10_0_sh_mask.h6917 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK 0x100 macro
H A Ddce_11_2_sh_mask.h7891 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK 0x100 macro
H A Ddce_12_0_sh_mask.h4878 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h1524 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
H A Ddcn_1_0_sh_mask.h3840 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
H A Ddcn_3_0_1_sh_mask.h2487 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
H A Ddcn_2_1_0_sh_mask.h2346 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
H A Ddcn_3_1_2_sh_mask.h1983 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
H A Ddcn_3_1_6_sh_mask.h2548 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
H A Ddcn_3_1_4_sh_mask.h10601 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
H A Ddcn_3_0_2_sh_mask.h2417 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
H A Ddcn_2_0_0_sh_mask.h2614 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro
H A Ddcn_3_0_0_sh_mask.h2489 #define DMCU_INTERRUPT_STATUS__EXTERNAL_SW_INT_OCCURRED_MASK … macro