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Searched refs:DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h4962 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h6459 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h3493 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h48054 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h10476 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h10497 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h6276 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h4092 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h6909 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h14588 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h6294 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h54621 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h6403 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h3493 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_STATE__SHIFT … macro