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Searched refs:DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h4961 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_0_1_sh_mask.h6458 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_2_1_sh_mask.h3492 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_2_1_0_sh_mask.h48053 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_5_1_sh_mask.h10475 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_5_0_sh_mask.h10496 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_1_2_sh_mask.h6275 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_1_5_sh_mask.h4091 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_1_6_sh_mask.h6908 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_1_4_sh_mask.h14587 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_0_2_sh_mask.h6293 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_2_0_0_sh_mask.h54620 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_0_0_sh_mask.h6402 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro
H A Ddcn_3_2_0_sh_mask.h3492 #define DMCUB_MEM_PWR_CNTL__DMCUB_MEM_PWR_DIS__SHIFT macro