Searched refs:DMA_ATTR_WEAK_ORDERING (Results 1 – 13 of 13) sorted by relevance
8 #define STMMAC_RX_DMA_ATTR (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
8 DMA_ATTR_WEAK_ORDERING chapter11 DMA_ATTR_WEAK_ORDERING specifies that reads and writes to the mapping14 Since it is optional for platforms to implement DMA_ATTR_WEAK_ORDERING,
473 DMA_ATTR_WEAK_ORDERING); in page_pool_dma_map()488 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); in page_pool_dma_map()664 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); in __page_pool_release_page_dma()
236 dma_attr |= DMA_ATTR_WEAK_ORDERING; in ib_umem_get()
118 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
317 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
488 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
207 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)
600 imem->attrs = DMA_ATTR_WEAK_ORDERING | in gk20a_instmem_new()
27 { DMA_ATTR_WEAK_ORDERING, "WEAK_ORDERING" }, \
20 #define DMA_ATTR_WEAK_ORDERING (1UL << 1) macro
1632 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); in gve_xsk_pool_enable()1663 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); in gve_xsk_pool_enable()1710 DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING); in gve_xsk_pool_disable()
143 (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)