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Searched refs:DKL_PLL_DIV1 (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
H A Dintel_dkl_phy_regs.h76 #define DKL_PLL_DIV1(tc_port) _DKL_REG(tc_port, \ macro
H A Dintel_dpll_mgr.c3654 hw_state->mg_pll_div1 = intel_dkl_phy_read(i915, DKL_PLL_DIV1(tc_port)); in dkl_pll_get_hw_state()
3877 val = intel_dkl_phy_read(i915, DKL_PLL_DIV1(tc_port)); in dkl_pll_write()
3881 intel_dkl_phy_write(i915, DKL_PLL_DIV1(tc_port), val); in dkl_pll_write()