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Searched refs:DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h464 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h2516 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_1_0_sh_mask.h4949 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h3881 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h1169 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h3666 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h8180 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h8201 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h3651 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h4218 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h12003 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h3848 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h3934 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h3957 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h1171 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT__SHIFT … macro