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Searched refs:DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h5623 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK 0x08000000L macro
H A Ddce_8_0_sh_mask.h6929 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK 0x8000000 macro
H A Ddce_11_0_sh_mask.h15074 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK 0x8000000 macro
H A Ddce_10_0_sh_mask.h14926 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK 0x8000000 macro
H A Ddce_11_2_sh_mask.h15736 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK 0x8000000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h2551 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK … macro
H A Ddcn_3_0_1_sh_mask.h3916 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK … macro
H A Ddcn_2_1_0_sh_mask.h3703 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK … macro
H A Ddcn_3_1_2_sh_mask.h3686 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK … macro
H A Ddcn_3_1_6_sh_mask.h4253 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK … macro
H A Ddcn_3_1_4_sh_mask.h12040 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h3883 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h3971 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h3992 #define DISP_INTERRUPT_STATUS__DMCU_SCP_INT_MASK … macro