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Searched refs:DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h2675 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_1_0_sh_mask.h5128 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h4040 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h1320 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h3847 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h8327 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h8348 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h3810 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h4377 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h12164 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h4007 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h4115 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h4116 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_4_1_0_sh_mask.h1533 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h1322 #define DISP_INTERRUPT_STATUS_CONTINUE4__OTG5_IHC_TRIGA_INTERRUPT__SHIFT … macro