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Searched refs:DISP_CC_MDSS_RSCC_VSYNC_CLK (Results 1 – 24 of 24) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dqcom,sm6375-dispcc.h29 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 18 macro
H A Dqcom,dispcc-sm6350.h39 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 28 macro
H A Dqcom,dispcc-sc7180.h38 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 29 macro
H A Dqcom,sm4450-dispcc.h31 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 21 macro
H A Dqcom,dispcc-sdm845.h32 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 22 macro
H A Dqcom,dispcc-sc7280.h46 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 36 macro
H A Dqcom,dispcc-sm8350.h53 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 43 macro
H A Dqcom,dispcc-sm8250.h53 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 43 macro
H A Dqcom,dispcc-sm8150.h53 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 43 macro
H A Dqcom,x1e80100-dispcc.h78 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 68 macro
H A Dqcom,dispcc-sc8280xp.h83 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 73 macro
H A Dqcom,sm8550-dispcc.h81 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 71 macro
H A Dqcom,sm8450-dispcc.h83 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 73 macro
/linux/drivers/clk/qcom/
H A Ddispcc-sm6375.c535 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-sc7180.c670 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-sm6350.c720 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-sm4450.c696 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-sdm845.c811 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-sc7280.c838 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-sm8250.c1212 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-sc8280xp.c2952 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp0_cc_mdss_rscc_vsync_clk.clkr,
3034 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp1_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-x1e80100.c1609 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-sm8550.c1719 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,
H A Ddispcc-sm8450.c1753 [DISP_CC_MDSS_RSCC_VSYNC_CLK] = &disp_cc_mdss_rscc_vsync_clk.clkr,