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Searched refs:DISP_CC_MDSS_PCLK1_CLK (Results 1 – 19 of 19) sorted by relevance

/linux/include/dt-bindings/clock/
H A Dqcom,dispcc-sdm845.h27 #define DISP_CC_MDSS_PCLK1_CLK 17 macro
H A Dqcom,dispcc-sm8350.h48 #define DISP_CC_MDSS_PCLK1_CLK 38 macro
H A Dqcom,dispcc-sm8250.h48 #define DISP_CC_MDSS_PCLK1_CLK 38 macro
H A Dqcom,dispcc-sm8150.h48 #define DISP_CC_MDSS_PCLK1_CLK 38 macro
H A Dqcom,x1e80100-dispcc.h75 #define DISP_CC_MDSS_PCLK1_CLK 65 macro
H A Dqcom,dispcc-sc8280xp.h77 #define DISP_CC_MDSS_PCLK1_CLK 67 macro
H A Dqcom,sm8550-dispcc.h78 #define DISP_CC_MDSS_PCLK1_CLK 68 macro
H A Dqcom,sm8450-dispcc.h77 #define DISP_CC_MDSS_PCLK1_CLK 67 macro
/linux/drivers/clk/qcom/
H A Ddispcc-sdm845.c806 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
H A Ddispcc-sm8250.c1207 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
H A Ddispcc-sc8280xp.c2946 [DISP_CC_MDSS_PCLK1_CLK] = &disp0_cc_mdss_pclk1_clk.clkr,
3028 [DISP_CC_MDSS_PCLK1_CLK] = &disp1_cc_mdss_pclk1_clk.clkr,
H A Ddispcc-x1e80100.c1606 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
H A Ddispcc-sm8550.c1716 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
H A Ddispcc-sm8450.c1747 [DISP_CC_MDSS_PCLK1_CLK] = &disp_cc_mdss_pclk1_clk.clkr,
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8350.dtsi2800 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsm8150.dtsi4060 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsm8550.dtsi3151 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsm8650.dtsi3664 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,
H A Dsm8250.dtsi4941 <&dispcc DISP_CC_MDSS_PCLK1_CLK>,