Searched refs:DISP_CC_MDSS_BYTE0_DIV_CLK_SRC (Results 1 – 25 of 26) sorted by relevance
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| /linux/include/dt-bindings/clock/ |
| H A D | qcom,sm6115-dispcc.h | 16 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 6 macro
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| H A D | qcom,dispcc-qcm2290.h | 15 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5 macro
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| H A D | qcom,sm6375-dispcc.h | 16 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5 macro
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| H A D | qcom,dispcc-sm6350.h | 16 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5 macro
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| H A D | qcom,dispcc-sc7180.h | 15 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 6 macro
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| H A D | qcom,sm4450-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5 macro
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| H A D | qcom,dispcc-sdm845.h | 36 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 26 macro
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| H A D | qcom,dispcc-sc7280.h | 15 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5 macro
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| H A D | qcom,dispcc-sm8350.h | 14 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 4 macro
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| H A D | qcom,dispcc-sm8250.h | 14 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 4 macro
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| H A D | qcom,dispcc-sm8150.h | 14 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 4 macro
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| H A D | qcom,x1e80100-dispcc.h | 16 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 6 macro
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| H A D | qcom,dispcc-sc8280xp.h | 19 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 9 macro
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| H A D | qcom,sm8550-dispcc.h | 16 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 6 macro
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| H A D | qcom,sm8450-dispcc.h | 15 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 5 macro
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| /linux/drivers/clk/qcom/ |
| H A D | dispcc-sm6375.c | 522 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr,
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| H A D | dispcc-sc7180.c | 647 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr,
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| H A D | dispcc-sm4450.c | 680 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr,
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| H A D | dispcc-sdm845.c | 777 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] =
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| H A D | dispcc-sc7280.c | 805 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr,
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| H A D | dispcc-sm8250.c | 1163 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr,
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| H A D | dispcc-sc8280xp.c | 2888 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp0_cc_mdss_byte0_div_clk_src.clkr,
2970 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp1_cc_mdss_byte0_div_clk_src.clkr,
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| H A D | dispcc-x1e80100.c | 1544 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr,
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| H A D | dispcc-sm8450.c | 1683 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr,
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| H A D | dispcc-sm8550.c | 1652 [DISP_CC_MDSS_BYTE0_DIV_CLK_SRC] = &disp_cc_mdss_byte0_div_clk_src.clkr,
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