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Searched refs:DC__VOLTAGE_STATES (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/resource/dcn30/
H A Ddcn30_resource.c2267 unsigned int dcfclk_mhz[DC__VOLTAGE_STATES] = {0}; in dcn30_update_bw_bounding_box()
2268 unsigned int dram_speed_mts[DC__VOLTAGE_STATES] = {0}; in dcn30_update_bw_bounding_box()
2269 unsigned int optimal_uclk_for_dcfclk_sta_targets[DC__VOLTAGE_STATES] = {0}; in dcn30_update_bw_bounding_box()
2270 unsigned int optimal_dcfclk_for_uclk[DC__VOLTAGE_STATES] = {0}; in dcn30_update_bw_bounding_box()
2272 unsigned int dcfclk_sta_targets[DC__VOLTAGE_STATES] = {694, 875, 1000, 1200}; in dcn30_update_bw_bounding_box()
2358 while (i < num_dcfclk_sta_targets && j < num_uclk_states && num_states < DC__VOLTAGE_STATES) { in dcn30_update_bw_bounding_box()
2372 while (i < num_dcfclk_sta_targets && num_states < DC__VOLTAGE_STATES) { in dcn30_update_bw_bounding_box()
2377 while (j < num_uclk_states && num_states < DC__VOLTAGE_STATES && in dcn30_update_bw_bounding_box()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddc_features.h39 #define DC__VOLTAGE_STATES 40 macro
H A Ddisplay_mode_structs.h182 struct _vcs_dpi_voltage_scaling_st clock_limits[DC__VOLTAGE_STATES];