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Searched refs:DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h26573 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h38655 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h33642 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h37302 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h37323 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h44451 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h42552 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h45516 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h49951 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h31788 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h30410 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h29566 #define DC_PERFMON18_PERFMON_HI__PERFMON_READ_SEL__SHIFT … macro