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Searched refs:DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_sh_mask.h21267 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h38042 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h32583 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_3_5_1_sh_mask.h36776 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_3_5_0_sh_mask.h36797 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h32715 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h30581 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h33479 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h49338 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h30649 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h28322 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h27822 #define DC_PERFMON17_PERFCOUNTER_STATE__PERFCOUNTER_STATE_SEL5__SHIFT … macro