Home
last modified time | relevance | path

Searched refs:DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h3797 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK 0x00000100L macro
H A Ddce_8_0_sh_mask.h4049 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK 0x100 macro
H A Ddce_11_0_sh_mask.h4081 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK 0x100 macro
H A Ddce_10_0_sh_mask.h3971 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK 0x100 macro
H A Ddce_11_2_sh_mask.h4517 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK 0x100 macro
H A Ddce_12_0_sh_mask.h10482 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h21808 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro
H A Ddcn_1_0_sh_mask.h41094 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro
H A Ddcn_3_2_1_sh_mask.h41842 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro
H A Ddcn_2_1_0_sh_mask.h43894 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro
H A Ddcn_3_0_2_sh_mask.h43209 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro
H A Ddcn_2_0_0_sh_mask.h49441 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro
H A Ddcn_3_0_0_sh_mask.h49862 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro
H A Ddcn_4_1_0_sh_mask.h41853 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro
H A Ddcn_3_2_0_sh_mask.h41821 #define DC_GPIO_PWRSEQ_MASK__DC_GPIO_DIGON_MASK_MASK macro