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Searched refs:DCIO_BL_PWM_GRP1_FRAME_START_DISP_SEL_CONTROLLER5 (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_enum.h260 DCIO_BL_PWM_GRP1_FRAME_START_DISP_SEL_CONTROLLER5= 0x4, enumerator
H A Ddce_11_0_enum.h1029 DCIO_BL_PWM_GRP1_FRAME_START_DISP_SEL_CONTROLLER5= 0x4, enumerator
H A Ddce_11_2_enum.h1428 DCIO_BL_PWM_GRP1_FRAME_START_DISP_SEL_CONTROLLER5= 0x4, enumerator
/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h11927 DCIO_BL_PWM_GRP1_FRAME_START_DISP_SEL_CONTROLLER5 = 0x00000004, enumerator
H A Dsoc24_enum.h9070 DCIO_BL_PWM_GRP1_FRAME_START_DISP_SEL_CONTROLLER5 = 0x00000004, enumerator
H A Dnavi10_enum.h8336 DCIO_BL_PWM_GRP1_FRAME_START_DISP_SEL_CONTROLLER5 = 0x00000004, enumerator
H A Dsoc21_enum.h9626 DCIO_BL_PWM_GRP1_FRAME_START_DISP_SEL_CONTROLLER5 = 0x00000004, enumerator