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Searched refs:DCDC2 (Results 1 – 25 of 25) sorted by relevance

/linux/Documentation/devicetree/bindings/mfd/
H A Dtps6507x.txt28 - defdcdc_default: It's property of DCDC2 and DCDC3 regulators.
29 0: If defdcdc pin of DCDC2/DCDC3 is pulled to GND.
30 1: If defdcdc pin of DCDC2/DCDC3 is driven HIGH.
H A Dwm831x.txt38 dcdc2 : DCDC2
/linux/drivers/regulator/
H A Drn5t618-regulator.c46 REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500),
63 REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500),
79 REG(DCDC2, DC2CTL, BIT(0), DC2DAC, 0xff, 600000, 3500000, 12500),
H A Dtps65912-regulator.c19 enum tps65912_regulators { DCDC1, DCDC2, DCDC3, DCDC4, LDO1, LDO2, LDO3, enumerator
76 TPS65912_REGULATOR("DCDC2", DCDC2, "dcdc2", tps65912_ops_dcdc,
H A Daxp20x-regulator.c629 AXP_DESC(AXP20X, DCDC2, "dcdc2", "vin2", 700, 2275, 25,
656 AXP_DESC(AXP22X, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
757 AXP_DESC_RANGES(AXP313A, DCDC2, "dcdc2", "vin2",
800 AXP_DESC_RANGES_DELAY(AXP717, DCDC2, "dcdc2", "vin2",
905 AXP_DESC_RANGES(AXP803, DCDC2, "dcdc2", "vin2",
1067 AXP_DESC(AXP809, DCDC2, "dcdc2", "vin2", 600, 1540, 20,
1137 AXP_DESC_RANGES(AXP813, DCDC2, "dcdc2", "vin2",
1244 AXP_DESC_RANGES(AXP15060, DCDC2, "dcdc2", "vin2",
H A Dact8945a-regulator.c256 ACT89xx_REG("DCDC_REG2", ACT8945A, DCDC2, VSET1, "vp2"),
266 ACT89xx_REG("DCDC_REG2", ACT8945A, DCDC2, VSET2, "vp2"),
H A Dact8865-regulator.c467 ACT88xx_REG("DCDC2", ACT8600, DCDC2, VSET, "vp2"),
534 ACT88xx_REG("DCDC_REG2", ACT8865, DCDC2, VSET1, "vp2"),
544 ACT88xx_REG("DCDC_REG2", ACT8865, DCDC2, VSET2, "vp2"),
H A Dtps65090-regulator.c209 tps65090_REG_FIXEDV(DCDC2, "vsys2", 0x0D, BIT(CTRL_EN_BIT), 3300000,
/linux/Documentation/devicetree/bindings/regulator/
H A Dtps65090.txt17 - ti,enable-ext-control: This is applicable for DCDC1, DCDC2 and DCDC3.
19 - dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3.
/linux/arch/arm/boot/dts/nxp/imx/
H A De70k02.dtsi167 dcdc2_reg: DCDC2 {
168 regulator-name = "DCDC2";
H A De60k02.dtsi153 dcdc2_reg: DCDC2 {
154 regulator-name = "DCDC2";
H A Dimx6sl-kobo-aura2.dts157 dcdc2_reg: DCDC2 {
158 regulator-name = "DCDC2";
H A Dimx7-colibri.dtsi434 reg_DCDC2: DCDC2 {
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64-sopine.dtsi94 /* DCDC3 is polyphased with DCDC2 */
H A Dsun50i-a64-nanopi-a64.dts193 /* DCDC3 is polyphased with DCDC2 */
H A Dsun50i-a64-pine64.dts188 /* DCDC3 is polyphased with DCDC2 */
H A Dsun50i-a64-bananapi-m64.dts257 /* DCDC3 is polyphased with DCDC2 */
H A Dsun50i-a64-amarula-relic.dts218 /* DCDC3 is polyphased with DCDC2 */
H A Dsun50i-h64-remix-mini-pc.dts233 /* DCDC3 is polyphased with DCDC2 */
H A Dsun50i-a64-olinuxino.dts257 /* DCDC3 is polyphased with DCDC2 */
H A Dsun50i-a64-orangepi-win.dts244 /* DCDC3 is polyphased with DCDC2 */
H A Dsun50i-a64-pinetab.dts334 /* DCDC3 is polyphased with DCDC2 */
/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-v3s-anbernic-rg-nano.dts183 /* DCDC2 wired into vdd-cpu, vdd-sys, and vdd-ephy. */
/linux/arch/mips/boot/dts/ingenic/
H A Dci20.dts306 vddmem: DCDC2 {
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-msc-sm2s.dtsi297 DCDC2 {