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Searched refs:DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h147 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_0_3_sh_mask.h535 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_1_0_sh_mask.h2021 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_0_1_sh_mask.h865 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_2_1_0_sh_mask.h477 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_5_1_sh_mask.h6428 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_5_0_sh_mask.h6449 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_1_2_sh_mask.h797 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_1_5_sh_mask.h300 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_1_6_sh_mask.h1334 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_1_4_sh_mask.h8265 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_0_2_sh_mask.h590 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_2_0_0_sh_mask.h595 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro
H A Ddcn_3_0_0_sh_mask.h576 #define DCCG_PERFMON_CNTL__DCCG_PERF_OTG_SEL_MASK … macro