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Searched refs:DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h3007 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK 0x00000040L macro
H A Ddce_8_0_sh_mask.h1645 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK 0x40 macro
H A Ddce_11_0_sh_mask.h1595 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK 0x40 macro
H A Ddce_10_0_sh_mask.h1647 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK 0x40 macro
H A Ddce_11_2_sh_mask.h1757 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK 0x40 macro
H A Ddce_12_0_sh_mask.h2655 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_1_sh_mask.h145 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_0_3_sh_mask.h533 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_1_0_sh_mask.h2019 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_0_1_sh_mask.h863 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_2_1_0_sh_mask.h475 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_5_1_sh_mask.h6426 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_5_0_sh_mask.h6447 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_1_2_sh_mask.h795 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_1_5_sh_mask.h298 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_1_6_sh_mask.h1332 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_1_4_sh_mask.h8263 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_0_2_sh_mask.h588 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_2_0_0_sh_mask.h593 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro
H A Ddcn_3_0_0_sh_mask.h574 #define DCCG_PERFMON_CNTL__DCCG_PERF_MODE_VSYNC_MASK … macro