/linux/arch/arm/crypto/ |
H A D | poly1305-armv4.pl | 496 my ($D0,$D1,$D2,$D3,$D4, $H0,$H1,$H2,$H3,$H4) = map("q$_",(5..14)); 557 vmull.u32 $D3,$R3,${R0}[1] 563 vmlal.u32 $D3,$R2,${R1}[1] 568 vmlal.u32 $D3,$R1,${R2}[1] 573 vmlal.u32 $D3,$R0,${R3}[1] 578 vmlal.u32 $D3,$R4,${S4}[1] 633 vshr.u64 $T0,$D3,#26 634 vmovn.i64 $D3#lo,$D3 638 vbic.i32 $D3#lo,#0xfc000000 @ &=0x03ffffff 655 vadd.i32 $D3#lo,$D3#lo,$T1#lo @ h2 -> h3 [all …]
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/linux/arch/x86/crypto/ |
H A D | poly1305-x86_64-cryptogams.pl | 419 my ($H0,$H1,$H2,$H3,$H4, $T0,$T1,$T2,$T3,$T4, $D0,$D1,$D2,$D3,$D4, $MASK) = 911 vpshufd \$0xEE,$D4,$D3 # 34xx -> 3434 913 vmovdqa $D3,-0x90(%r11) 920 vpshufd \$0xEE,$D2,$D3 923 vmovdqa $D3,-0x70(%r11) 930 vpshufd \$0xEE,$D1,$D3 933 vmovdqa $D3,-0x50(%r11) 940 vpshufd \$0xEE,$D0,$D3 943 vmovdqa $D3,-0x30(%r11) 949 vpshufd \$0xEE,$D2,$D3 [all …]
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/linux/arch/s390/crypto/ |
H A D | chacha-s390.S | 458 #define D3 %v15 macro 510 VAF D3,K3,T3 # K[3]+3 523 VLR T3,D3 535 VX D3,D3,A3 541 VERLLF D3,D3,16 548 VAF C3,C3,D3 573 VX D3,D3,A3 579 VERLLF D3,D3,8 586 VAF C3,C3,D3 617 VSLDB D3,D3,D3,12 [all …]
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/linux/Documentation/i2c/ |
H A D | i2c-topology.rst | 66 '--| dev D3 | 84 of the entire operation. But accesses to D3 are possibly interleaved 145 '--| dev D3 | 165 This means that accesses to both D2 and D3 are locked out for the full 204 '--| dev D4 | '--| dev D3 | 228 '--| dev D4 | '--| dev D3 | 233 are locked). But accesses to D3 and D4 are possibly interleaved at 236 Accesses to D3 locks out D1 and D2, but accesses to D4 are still possibly 251 '--| dev D4 | '--| dev D3 | 254 When device D1 is accessed, accesses to D2 and D3 are locked out [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | stm32f7-pinctrl.dtsi | 240 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1 D3 */ 253 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1 D3 */ 271 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1 D3 */ 282 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */ 295 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2 D3 */ 313 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2 D3 */
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/linux/arch/m68k/fpsp040/ |
H A D | srem_mod.S | 117 movel 8(%a0),%d5 | ...(D3,D4,D5) is |Y| 133 subl %d6,%d3 | ...(D3,D4,D5) is normalized 147 orl %d7,%d4 | ...(D3,D4,D5) normalized 152 addil #0x00003FFE,%d3 | ...(D3,D4,D5) normalized 207 clrl %d3 | ...D3 is Q
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/linux/arch/arm64/boot/dts/renesas/ |
H A D | r8a77995-draak.dts | 3 * Device Tree Source for the Draak board with R-Car D3
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/linux/Documentation/translations/zh_CN/sound/hd-audio/ |
H A D | controls.rst | 76 动态更改组件的电源状态(D0/D3)以节省电量消耗。但是,如果您的系统没有提
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/linux/drivers/gpu/drm/xe/ |
H A D | xe_step_types.h | 39 func(D3) \
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/linux/drivers/gpu/drm/i915/ |
H A D | intel_step.h | 40 func(D3) \
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/linux/arch/arm/boot/dts/allwinner/ |
H A D | sun8i-h2-plus-bananapi-m2-zero.dts | 234 "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3", 242 "WL-SDIO-D2", "WL-SDIO-D3", "BT-UART-TX", "BT-UART-RX",
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H A D | sun6i-a31s-sinovoip-bpi-m2.dts | 282 "WL-SDIO-D0", "WL-SDIO-D2", "WL-SDIO-D2", "WL-SDIO-D3", 302 "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
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H A D | sun7i-a20-bananapi.dts | 229 "SD0-D1", "SD0-D0", "SD0-CLK", "SD0-CMD", "SD0-D3",
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/linux/Documentation/networking/ |
H A D | plip.rst | 145 D3->ACK 5 - 10 10 - 5 176 D3->D3 5 - 5
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/linux/drivers/platform/x86/intel/atomisp2/ |
H A D | Kconfig | 39 is to turn the ISP off (put it in D3) to save power and to allow
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/linux/drivers/pmdomain/renesas/ |
H A D | Kconfig | 11 bool "System Controller support for R-Car D3" if COMPILE_TEST
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/linux/drivers/soc/renesas/ |
H A D | Kconfig | 199 bool "ARM64 Platform support for R-Car D3" 203 This enables support for the Renesas R-Car D3 SoC.
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/linux/Documentation/power/ |
H A D | pci.rst | 85 The PCI PM Spec defines 4 operating states for devices (D0-D3) and for buses 90 There are two variants of the D3 state defined by the specification. The first 91 one is D3hot, referred to as the software accessible D3, because devices can be 118 | D0 | D1, D2, D3 | 120 | D1 | D2, D3 | 122 | D2 | D3 | 124 | D1, D2, D3 | D0 | 133 while in any power state (D0-D3), but they are not required to be capable 166 labeled as D0, D1, D2, and D3 that roughly correspond to the native PCI PM 167 D0-D3 states (although the difference between D3hot and D3cold is not taken [all …]
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/linux/Documentation/spi/ |
H A D | spi-lm70llp.rst | 42 D3 5 --> V+ 5
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H A D | butterfly.rst | 67 SCK J403.PE4/USCK pin 5/D3
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mn-rve-gateway.dts | 261 MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x00000156 /* D3 */
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/linux/drivers/pinctrl/aspeed/ |
H A D | pinctrl-aspeed-g6.c | 1404 #define D3 223 macro 1405 SIG_EXPR_LIST_DECL_SESG(D3, RGMII2TXD1, RGMII2, SIG_DESC_SET(SCU400, 15), 1407 SIG_EXPR_LIST_DECL_SESG(D3, RMII2TXD1, RMII2, SIG_DESC_SET(SCU400, 15), 1409 PIN_DECL_2(D3, GPIO18B7, RGMII2TXD1, RMII2TXD1); 1461 FUNC_GROUP_DECL(RGMII2, D4, C2, C1, D3, E4, F5, D2, E3, D1, F4, E2, E1); 1462 FUNC_GROUP_DECL(RMII2, D4, C2, C1, D3, D2, D1, F4, E2, E1); 1805 ASPEED_PINCTRL_PIN(D3), 2628 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, B2, D3, SCU40C, 1), 2629 ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, B2, D3, SCU40C, 1),
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/linux/arch/arm/boot/dts/renesas/ |
H A D | r8a7792-wheat.dts | 43 regulator-name = "D3.3V";
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H A D | r8a7792-blanche.dts | 44 regulator-name = "D3.3V";
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/linux/Documentation/translations/zh_CN/PCI/ |
H A D | pci.rst | 429 pci_set_power_state() 设置PCI电源管理状态(0=D0 ... 3=D3
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