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Searched refs:Cell (Results 1 – 25 of 30) sorted by relevance

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/linux/rust/syn/
H A Dparse.rs195 use std::cell::Cell;
261 cell: Cell<Cursor<'static>>,
263 unexpected: Cell<Option<Rc<Cell<Unexpected>>>>,
390 unexpected: Rc<Cell<Unexpected>>, in new_parse_buffer()
395 cell: Cell::new(unsafe { mem::transmute::<Cursor, Cursor<'static>>(cursor) }), in new_parse_buffer()
397 unexpected: Cell::new(Some(unexpected)), in new_parse_buffer()
404 Chain(Rc<Cell<Unexpected>>),
425 fn cell_clone<T: Default + Clone>(cell: &Cell<T>) -> T { in cell_clone()
432 fn inner_unexpected(buffer: &ParseBuffer) -> (Rc<Cell<Unexpected>>, Option<(Span, Delimiter)>) { in inner_unexpected()
443 pub(crate) fn get_unexpected(buffer: &ParseBuffer) -> Rc<Cell<Unexpected>> { in get_unexpected()
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H A Ddiscouraged.rs10 use std::cell::Cell;
192 .set(Some(Rc::new(Cell::new(Unexpected::None)))); in advance_to()
H A Dlit.rs864 use std::cell::Cell;
1028 let unexpected = Rc::new(Cell::new(Unexpected::None)); in peek_impl()
/linux/Documentation/devicetree/bindings/reset/
H A Dti-syscon-reset.txt33 Cell #1 : offset of the reset assert control
35 Cell #2 : bit position of the reset in the reset
37 Cell #3 : offset of the reset deassert control
39 Cell #4 : bit position of the reset in the reset
41 Cell #5 : offset of the reset status register
43 Cell #6 : bit position of the reset in the
45 Cell #7 : Flags used to control reset behavior,
/linux/rust/pin-init/examples/
H A Dstatic_init.rs8 cell::{Cell, UnsafeCell},
27 init: Cell<Option<I>>,
29 present: Cell<bool>,
39 init: Cell::new(Some(init)), in new()
41 present: Cell::new(false), in new()
H A Dlinked_list.rs7 cell::Cell,
95 struct Link(Cell<NonNull<ListHead>>);
106 Self(Cell::new(ptr))
H A Dmutex.rs8 cell::{Cell, UnsafeCell},
70 locked: Cell<bool>,
81 locked: Cell::new(false), in new()
/linux/rust/zerocopy/src/pointer/
H A Dtransmute.rs14 cell::{Cell, UnsafeCell},
461 // - `Cell<T>` has the same size as `T` [1].
462 // - Per [1], `Cell<T>` has the same bit validity as `T`. Technically the term
468 // [1] Per https://doc.rust-lang.org/1.85.0/std/cell/struct.Cell.html#memory-layout:
470 // `Cell<T>` has the same memory layout and caveats as `UnsafeCell<T>`. In
471 // particular, this means that `Cell<T>` has the same in-memory representation
480 const _: () = unsafe { unsafe_impl_for_transparent_wrapper!(pub T: ?Sized => Cell<T>) };
482 impl_transitive_transmute_from!(T: ?Sized => Cell<T> => T => UnsafeCell<T>);
483 impl_transitive_transmute_from!(T: ?Sized => UnsafeCell<T> => T => Cell<T>);
524 // T: ?Sized => Cell<
[all...]
/linux/Documentation/arch/powerpc/
H A Disa-versions.rst20 Cell PPU - Power ISA v2.02 with some minor exceptions
54 Cell PPU Yes
74 Cell PPU No
94 Cell PPU No
H A Dcpu_families.rst85 | POWER6 | <-?-> | Cell |
H A Delf_hwcaps.rst128 The processor is Cell.
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu75.h679 VFT_CELL_t Cell[TEMP_RANGE_MAXSTEPS][NUM_VFT_COLUMNS]; member
715 VFT_CELL_t Cell[NUM_VFT_COLUMNS]; member
720 VFT_CELL_t Cell[NUM_VFT_COLUMNS]; member
725 VFT_CELL_t Cell[NUM_VFT_COLUMNS]; member
730 VFT_CELL_t Cell[NUM_VFT_COLUMNS]; member
H A Dsmu74.h782 VFT_CELL_t Cell[TEMP_RANGE_MAXSTEPS][NUM_VFT_COLUMNS]; member
796 VFT_CELL_t Cell[NUM_VFT_COLUMNS]; member
812 VFT_CELL_t Cell[NUM_VFT_COLUMNS]; member
H A Dsmu73.h699 VFT_CELL_t Cell[TEMP_RANGE_MAXSTEPS][NUM_VFT_COLUMNS]; member
/linux/arch/powerpc/platforms/cell/
H A DKconfig6 menu "Cell Broadband Engine options"
/linux/drivers/net/ethernet/ibm/emac/
H A DKconfig10 Axon southbridge for Cell.
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-st.txt69 - First Cell: represents the external gpio interrupt number local to the
71 - Second Cell: flags to identify the type of the interrupt
/linux/arch/powerpc/platforms/ps3/
H A DKconfig55 per device dynamic DMA page table management provided by the Cell
168 profiling support of the Cell processor with programs like
/linux/Documentation/devicetree/bindings/phy/
H A Dphy-miphy365x.txt22 Cell after port phandle is device type from:
H A Dphy-miphy28lp.txt20 Cell after port phandle is device type from:
/linux/Documentation/translations/zh_CN/admin-guide/
H A DREADME.rst33 PowerPC64、ARM、Hitachi SuperH、Cell、IBM S/390、MIPS、HP PA-RISC、Intel
/linux/rust/zerocopy/src/
H A Dimpls.rs13 cell::{Cell, UnsafeCell},
827 impl_for_transmute_from!(T: ?Sized + TryFromBytes => TryFromBytes for Cell<T>[T]);
828 impl_for_transmute_from!(T: ?Sized + FromZeros => FromZeros for Cell<T>[T]);
829 impl_for_transmute_from!(T: ?Sized + FromBytes => FromBytes for Cell<T>[T]);
830 impl_for_transmute_from!(T: ?Sized + IntoBytes => IntoBytes for Cell<T>[T]);
831 // SAFETY: `Cell<T>` has the same in-memory representation as `T` [1], and thus
834 // [1] Per https://doc.rust-lang.org/1.81.0/core/cell/struct.Cell.html#memory-layout:
836 // `Cell<T>` has the same in-memory representation as its inner type `T`.
837 const _: () = unsafe { unsafe_impl!(T: ?Sized + Unaligned => Unaligned for Cell<T>) };
/linux/Documentation/scsi/
H A Daic79xx.rst398 :Definition: Set IO Cell precompensation value on a per-controller basis.
421 :Definition: Set IO Cell slew rate on a per-controller basis.
444 :Definition: Set IO Cell signal amplitude on a per-controller basis.
/linux/drivers/mtd/nand/raw/
H A DKconfig145 Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell
157 Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND
/linux/Documentation/filesystems/
H A Dafs.rst170 The Cell Database

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