Searched refs:CSR_DRAM_INT_TBL_REG (Results 1 – 3 of 3) sorted by relevance
133 #define CSR_DRAM_INT_TBL_REG (CSR_BASE+0x0A0) macro
89 #define CSR_DRAM_INT_TBL_REG (CSR_BASE+0x0A0) macro
2223 iwl_write32(trans, CSR_DRAM_INT_TBL_REG, val); in iwl_pcie_reset_ict()