Searched refs:CSR_CFG_MASK (Results 1 – 2 of 2) sorted by relevance
| /linux/arch/loongarch/kernel/ |
| H A D | hw_breakpoint.c | 84 GEN_READ_WB_REG_CASES(CSR_CFG_MASK, MASK, t, val); in write_wb_reg()
99 GEN_WRITE_WB_REG_CASES(CSR_CFG_MASK, MASK, t, val);
224 write_wb_reg(CSR_CFG_MASK, i, 0, info->mask); in hw_breakpoint_control()
229 write_wb_reg(CSR_CFG_MASK, i, 1, info->mask); in hw_breakpoint_control()
243 write_wb_reg(CSR_CFG_MASK, i, 0, 0); in hw_breakpoint_control()
248 write_wb_reg(CSR_CFG_MASK, i, 1, 0);
552 mask = read_wb_reg(CSR_CFG_MASK, 0, 0); in hw_breakpoint_pmu_read()
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| /linux/arch/loongarch/include/asm/ |
| H A D | hw_breakpoint.h | 46 #define CSR_CFG_MASK (CSR_CFG_ADDR + LOONGARCH_MAX_BRP) macro
47 #define CSR_CFG_CTRL (CSR_CFG_MASK + LOONGARCH_MAX_BRP)
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