Searched refs:CSIDPHY_LANE_CLK_3_PHASE (Results 1 – 1 of 1) sorted by relevance
72 #define CSIDPHY_LANE_CLK_3_PHASE 0x38 macro313 val = readl(priv->phy_base + CSIDPHY_LANE_CLK_3_PHASE); in rockchip_inno_csidphy_power_on()316 writel(val, priv->phy_base + CSIDPHY_LANE_CLK_3_PHASE); in rockchip_inno_csidphy_power_on()