/linux/Documentation/ABI/testing/ |
H A D | sysfs-bus-iio-sx9324 | 6 SX9324 has 3 inputs, CS0, CS1 and CS2. Hardware layout 18 By default, during the first phase, [PH0], CS0 is measured, 21 [PH1], CS1 is measured, CS0 and CS2 are shield: 23 [PH2], CS2 is measured, CS0 and CS1 are shield:
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H A D | sysfs-class-watchdog | 110 chip at CS0 after booting from the alternate 114 from (CS0->CS1, CS1->CS0) to (CS0->CS0, 119 the SoC is in normal mapping state (i.e. booted from CS0),
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/linux/drivers/staging/fbtft/ |
H A D | fb_agm1264k-fl.c | 32 #define CS0 gpio.aux[0] macro 101 if (!par->CS0) { in verify_gpios() 132 par->CS0 = gpio->gpio; in request_gpios_match() 184 gpiod_set_value(par->CS0, 0); in write_reg8_bus8() 188 gpiod_set_value(par->CS0, 1); in write_reg8_bus8() 387 gpiod_set_value(par->CS0, 0); in write_vmem()
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap2420-n8x0-common.dtsi | 48 ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */ 56 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
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H A D | omap3-gta04a5one.dts | 44 ranges = <0 0 0x04000000 0x1000000>; /* CS0: 16MB for OneNAND */ 55 reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */
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H A D | am335x-chilisom.dtsi | 143 ranges = <0 0 0x08000000 0x01000000>; /* CS0 0 @addr 0x08000000, size 0x01000000 */ 146 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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H A D | am335x-igep0033.dtsi | 132 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ 136 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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H A D | omap3-devkit8000-lcd-common.dtsi | 52 reg = <0>; /* CS0 */
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H A D | omap3-panel-sharp-ls037v7dw01.dtsi | 60 reg = <0>; /* CS0 */
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H A D | am335x-phycore-som.dtsi | 196 ranges = <0 0 0x08000000 0x1000000>; /* CS0: NAND */ 199 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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H A D | omap3-igep0030-common.dtsi | 102 ranges = <0 0 0x30000000 0x01000000>; /* CS0: 16MB for NAND */
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/linux/arch/arm/boot/dts/intel/ixp/ |
H A D | intel-ixp42x-iomega-nas100d.dts | 93 /* The first 16MB region at CS0 on the expansion bus */ 99 * mapped in at CS0.
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H A D | intel-ixp42x-dlink-dsm-g600.dts | 103 /* The first 16MB region at CS0 on the expansion bus */ 109 * mapped in at CS0.
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H A D | intel-ixp42x-linksys-nslu2.dts | 107 /* The first 16MB region at CS0 on the expansion bus */ 115 * mapped in at CS0.
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H A D | intel-ixp46x-ixdp465.dts | 26 /* 32 MB of Flash mapped in at CS0 and CS1 */
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H A D | intel-ixp43x-kixrp435.dts | 26 /* 16 MB of Flash mapped in at CS0 */
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H A D | intel-ixp42x-ixdp425.dts | 30 /* 16 MB of Flash mapped in at CS0 */
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H A D | intel-ixp42x-netgear-wg302v1.dts | 42 * mapped in at CS0.
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/linux/arch/powerpc/boot/dts/ |
H A D | cm5200.dts | 75 // 16-bit flash device at LocalPlus Bus CS0
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H A D | o2d.dtsi | 74 // flash device at LocalPlus Bus CS0
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H A D | motionpro.dts | 121 // 16-bit flash device at LocalPlus Bus CS0
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H A D | digsy_mtc.dts | 102 // 16-bit flash device at LocalPlus Bus CS0
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/linux/arch/arm64/boot/dts/microchip/ |
H A D | sparx5_pcb125.dts | 49 reg = <0>; /* CS0 */
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/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-370-xp.dtsi | 269 <MBUS_ID(0x01, 0x1e) 0 0xffffffff>, /* CS0 */ 287 <MBUS_ID(0x01, 0x1a) 0 0xffffffff>, /* CS0 */
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H A D | armada-38x-solidrun-microsom.dtsi | 101 /* The microsom has an optional W25Q32 on board, connected to CS0 */
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