Searched refs:CRTC2_GEN_CNTL (Results 1 – 5 of 5) sorted by relevance
581 rinfo->save_regs[18] = (INREG(CRTC2_GEN_CNTL) & 0xfdffffff) | 0x04000000; in radeon_pm_save_regs()718 OUTREG(CRTC2_GEN_CNTL, rinfo->save_regs[18]); in radeon_pm_restore_regs()1052 OUTREG( CRTC2_GEN_CNTL, (INREG( CRTC2_GEN_CNTL) & ~CRTC2_GEN_CNTL__CRTC2_EN) in radeon_pm_setup_for_suspend()1253 crtcGenCntl2 = INREG( CRTC2_GEN_CNTL); in radeon_pm_full_reset_sdram()1265 OUTREG( CRTC2_GEN_CNTL, (crtcGenCntl2 | CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B) ); in radeon_pm_full_reset_sdram()1424 OUTREG( CRTC2_GEN_CNTL, crtcGenCntl2); in radeon_pm_full_reset_sdram()1793 OUTREG(CRTC2_GEN_CNTL, INREG(CRTC2_GEN_CNTL) in radeon_reinitialize_M10()2114 OUTREG(CRTC2_GEN_CNTL, 0x04000000); in radeon_reinitialize_M9P()2238 OUTREG(CRTC2_GEN_CNTL, INREG(CRTC2_GEN_CNTL));2426 c2gc = INREG(CRTC2_GEN_CNTL);[all …]
69 #define CRTC2_GEN_CNTL 0x03f8 macro
99 #define CRTC2_GEN_CNTL 0x03f8 macro
3803 save->CRTC2_GEN_CNTL = RREG32(R_0003F8_CRTC2_GEN_CNTL); in r100_mc_stop()3823 (C_0003F8_CRTC2_CUR_EN & save->CRTC2_GEN_CNTL) | in r100_mc_stop()3843 WREG32(R_0003F8_CRTC2_GEN_CNTL, save->CRTC2_GEN_CNTL); in r100_mc_resume()
57 u32 CRTC2_GEN_CNTL; member