Searched refs:CR0 (Results 1 – 10 of 10) sorted by relevance
| /linux/Documentation/virt/kvm/x86/ |
| H A D | errata.rst | 78 CR0.CD 80 KVM does not virtualize CR0.CD on Intel CPUs. Similar to MTRR MSRs, KVM 81 emulates CR0.CD accesses so that loads and stores from/to CR0 behave as 82 expected, but setting CR0.CD=1 has no impact on the cachaeability of guest 85 Note, this erratum does not affect AMD CPUs, which fully virtualize CR0.CD in 86 hardware, i.e. put the CPU caches into "no fill" mode when CR0.CD=1, even when
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| H A D | mmu.rst | 429 CR4.SMAP && !CR0.WP into shadow page's role to avoid this case. Note,
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| /linux/arch/powerpc/include/uapi/asm/ |
| H A D | termbits.h | 88 #define CR0 0x00000 macro
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| /linux/arch/parisc/include/uapi/asm/ |
| H A D | termbits.h | 74 #define CR0 0x00000 macro
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| /linux/include/uapi/asm-generic/ |
| H A D | termbits.h | 74 #define CR0 0x00000 macro
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| /linux/arch/alpha/include/uapi/asm/ |
| H A D | termbits.h | 93 #define CR0 0x00000 macro
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| /linux/arch/mips/include/uapi/asm/ |
| H A D | termbits.h | 94 #define CR0 0x00000 macro
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| /linux/drivers/dma/ |
| H A D | pl330.c | 132 #define CR0 0xe00 macro 1835 val = readl(regs + CR0) >> CR0_NUM_CHANS_SHIFT; in read_dmac_config() 1840 val = readl(regs + CR0); in read_dmac_config() 1850 val = readl(regs + CR0); in read_dmac_config() 1856 val = readl(regs + CR0) >> CR0_NUM_EVENTS_SHIFT; in read_dmac_config()
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| /linux/Documentation/virt/kvm/ |
| H A D | api.rst | 8446 KVM_X86_QUIRK_CD_NW_CLEARED By default, KVM clears CR0.CD and CR0.NW on 8448 that runs in perpetuity with CR0.CD, i.e. 8452 change the value of CR0.CD and CR0.NW. 8522 not affect VMX MSRs CR0/CR4_FIXED1 (0x487
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| /linux/tools/arch/x86/kcpuid/ |
| H A D | cpuid.csv | 671 0x80000001, 0, ecx, 4, cr8_legacy , LOCK MOV CR0 means MOV CR8
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