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Searched refs:CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2927 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT 0x00000003 macro
H A Dgfx_7_2_sh_mask.h2564 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT 0x3 macro
H A Dgfx_8_1_sh_mask.h3650 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT 0x3 macro
H A Dgfx_8_0_sh_mask.h3128 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT 0x3 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19382 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
H A Dgc_9_1_sh_mask.h20689 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h20616 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h12843 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h22778 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h26766 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h27291 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h29266 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h25552 #define CP_SIG_SEM_ADDR_LO__SEM_ADDR_LO__SHIFT … macro