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Searched refs:CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2919 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT 0x00000018 macro
H A Dgfx_7_2_sh_mask.h2572 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT 0x18 macro
H A Dgfx_8_1_sh_mask.h3658 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT 0x18 macro
H A Dgfx_8_0_sh_mask.h3136 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT 0x18 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19389 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT … macro
H A Dgc_9_1_sh_mask.h20696 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h20623 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h12850 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h22785 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h26773 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h27298 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h29273 #define CP_SIG_SEM_ADDR_HI__SEM_CLIENT_CODE__SHIFT … macro