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Searched refs:CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3175 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK 0x3ff0000 macro
H A Dgfx_8_1_sh_mask.h4311 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK 0x3ff0000 macro
H A Dgfx_8_0_sh_mask.h3789 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK 0x3ff0000 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1284 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK … macro
H A Dgc_9_1_sh_mask.h1183 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK … macro
H A Dgc_9_2_1_sh_mask.h1150 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK … macro
H A Dgc_9_4_2_sh_mask.h1783 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK … macro
H A Dgc_11_5_0_sh_mask.h3780 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK … macro
H A Dgc_11_0_0_sh_mask.h6627 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK … macro
H A Dgc_12_0_0_sh_mask.h7068 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK … macro
H A Dgc_10_1_0_sh_mask.h6768 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK … macro
H A Dgc_11_0_3_sh_mask.h7402 #define CP_ROQ_RB_STAT__ROQ_WPTR_PRIMARY_MASK … macro