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Searched refs:CP_ROQ_AVAIL__ROQ_CNT_RING_MASK (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2888 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 0x000007ffL macro
H A Dgfx_7_2_sh_mask.h3155 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 0x7ff macro
H A Dgfx_8_1_sh_mask.h4291 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 0x7ff macro
H A Dgfx_8_0_sh_mask.h3769 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 0x7ff macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1259 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK … macro
H A Dgc_9_1_sh_mask.h1158 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK … macro
H A Dgc_9_2_1_sh_mask.h1125 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK … macro
H A Dgc_9_4_2_sh_mask.h1758 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK … macro
H A Dgc_11_5_0_sh_mask.h3753 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK … macro
H A Dgc_11_0_0_sh_mask.h6600 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK … macro
H A Dgc_12_0_0_sh_mask.h7041 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK … macro
H A Dgc_10_1_0_sh_mask.h6741 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK … macro
H A Dgc_11_0_3_sh_mask.h7375 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK … macro
H A Dgc_10_3_0_sh_mask.h7007 #define CP_ROQ_AVAIL__ROQ_CNT_RING_MASK 0x00000FFFL macro
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