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Searched refs:CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2871 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT 0x00000018 macro
H A Dgfx_7_2_sh_mask.h3132 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT 0x18 macro
H A Dgfx_8_1_sh_mask.h4268 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT 0x18 macro
H A Dgfx_8_0_sh_mask.h3746 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT 0x18 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h1225 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro
H A Dgc_9_1_sh_mask.h1124 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1091 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h1724 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h3729 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h6576 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h7017 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h6712 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h7351 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h6978 #define CP_ROQ1_THRESHOLDS__R1_IB1_START__SHIFT … macro