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Searched refs:CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c5084 doorbell = (db_ctrl & CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK) >> in gfx_v12_0_userq_priv_fault_work()
H A Dgfx_v11_0.c6747 doorbell = (db_ctrl & CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK) >> in gfx_v11_0_userq_priv_fault_work()
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h2269 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK 0x7ffffc macro
H A Dgfx_8_0_sh_mask.h1745 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK 0x7ffffc macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10909 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK … macro
H A Dgc_9_1_sh_mask.h12386 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK … macro
H A Dgc_9_2_1_sh_mask.h12190 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK … macro
H A Dgc_9_4_2_sh_mask.h2206 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK … macro
H A Dgc_11_5_0_sh_mask.h13355 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK … macro
H A Dgc_11_0_0_sh_mask.h16661 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK … macro
H A Dgc_12_0_0_sh_mask.h12663 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK … macro
H A Dgc_10_1_0_sh_mask.h19186 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK … macro
H A Dgc_11_0_3_sh_mask.h18904 #define CP_RB_DOORBELL_CONTROL__DOORBELL_OFFSET_MASK … macro