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Searched refs:CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2731 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT 0x00000002 macro
H A Dgfx_7_2_sh_mask.h1114 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT 0x2 macro
H A Dgfx_8_1_sh_mask.h1954 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT 0x2 macro
H A Dgfx_8_0_sh_mask.h1430 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT 0x2 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10729 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
H A Dgc_9_1_sh_mask.h12206 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h12011 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h2027 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h11967 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h15152 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h11624 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h17646 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h17304 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h15906 #define CP_RB0_RPTR_ADDR__RB_RPTR_ADDR__SHIFT … macro