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Searched refs:CP_RB0_CNTL__MIN_AVAILSZ__SHIFT (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h2715 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT 0x00000014 macro
H A Dgfx_7_2_sh_mask.h1048 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT 0x14 macro
H A Dgfx_8_1_sh_mask.h1890 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT 0x14 macro
H A Dgfx_8_0_sh_mask.h1366 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT 0x14 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h10697 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_9_1_sh_mask.h12174 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_9_2_1_sh_mask.h11979 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_9_4_3_sh_mask.h13701 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_9_4_2_sh_mask.h1995 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_11_5_0_sh_mask.h11915 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_11_0_0_sh_mask.h15100 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_12_0_0_sh_mask.h11576 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_10_1_0_sh_mask.h17598 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_11_0_3_sh_mask.h17252 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro
H A Dgc_10_3_0_sh_mask.h15858 #define CP_RB0_CNTL__MIN_AVAILSZ__SHIFT macro