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Searched refs:CP_MQD_CONTROL__VMID_MASK (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v7_0.c2845 mqd->cp_mqd_control &= ~CP_MQD_CONTROL__VMID_MASK; in gfx_v7_0_mqd_init()
/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3445 #define CP_MQD_CONTROL__VMID_MASK 0xf macro
H A Dgfx_8_1_sh_mask.h4603 #define CP_MQD_CONTROL__VMID_MASK 0xf macro
H A Dgfx_8_0_sh_mask.h4081 #define CP_MQD_CONTROL__VMID_MASK 0xf macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h13060 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_9_1_sh_mask.h14360 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_9_2_1_sh_mask.h14225 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_9_4_3_sh_mask.h16592 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_9_4_2_sh_mask.h4158 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_11_5_0_sh_mask.h14294 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_11_0_0_sh_mask.h17600 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_12_0_0_sh_mask.h13490 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_10_1_0_sh_mask.h20480 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_11_0_3_sh_mask.h19845 #define CP_MQD_CONTROL__VMID_MASK … macro
H A Dgc_10_3_0_sh_mask.h18633 #define CP_MQD_CONTROL__VMID_MASK … macro