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Searched refs:CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT (Results 1 – 14 of 14) sorted by relevance

/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h3288 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT 0x0 macro
H A Dgfx_8_1_sh_mask.h4408 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT 0x0 macro
H A Dgfx_8_0_sh_mask.h3886 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT 0x0 macro
/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h12797 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_9_1_sh_mask.h14097 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h13962 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h16325 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h3893 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_11_5_0_sh_mask.h13958 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h17264 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_12_0_0_sh_mask.h13164 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20204 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h19503 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18359 #define CP_MQD_BASE_ADDR_HI__BASE_ADDR_HI__SHIFT … macro